This invention relates generally to imaging devices, and more particularly, to imaging devices with data converting circuits and associated code correction circuitry.
Image sensors are commonly used in electronic devices such as cellular telephones, cameras, and computers to capture images. In a typical arrangement, an electronic device with an image sensor is provided with an array of image sensor pixels arranged in pixel rows and columns.
One type of conventional image sensor features analog-to-digital converter (ADC) circuitry that is connected to each column in an image pixel array. The ADC circuitry receives signals provided from image sensor pixels in a selected row via column lines. The ADC circuitry can be implemented using a hybrid ramp and successive approximation register (SAR) ADC architecture. In such types of hybrid ramp-SAR ADC architecture, a SAR ADC and a ramp ADC are sequentially used to convert analog signals to digital signals. Performing conversion in this way may sometimes exhibit non-ideal behavior due to ADC non-linearity and code mismatch at the transition between SAR conversion and ramp conversion, which can result in degraded ADC performance.
It would therefore be desirable to be able to provide imaging devices that includes hybrid ADC architectures with improved performance.